Conventional package processes of the integrated circuit (IC) is used for one set of one and includes the following steps: providing a lead frame or a substrate; attaching a die (chip); providing a plurality of bonding wires; molding the die; and trimming and forming a package. The size of the packaged integral circuit is several times bigger than that of the chip. The flip chip is provided with a bump which is made of Cu or solder for soldering the chip to a printed circuit board (PCB). When the flip chip is mounted on the PCB, the active surface of a flip chip faces down (hence the name).
A connection of the flip chip is also known as a controlled collapse chip connection (C4 connection) and developed by the IBM Corporation of U.S.A. The flip chip connection belongs to a connection technology of the area array, and does not belong to connection technologies of a wire bond and a tape automated bonding (TAB) that only provides a connection of the peripheral array. Thus, the flip chip connection can be applied to a process and packaged with much higher wire density. The proportion of the connection technology of the flip chip to the future connection technology of the package with higher wire density will be large.
The principle of flip chip connections is that solder bumps are firstly formed on the metal pad of a chip, the chip is put on a substrate, the solder bumps the chip are aligned with pads of the substrate, and the chip and substrate are processed by means of heat treatment of reflow. After the solder melted, it forms a ball by means of surface tension, such that the connection between the chip and the substrate is complete.
There are many types of solder. Typical solders are as follows: an alloy (95% Pb and 5% Sn) with high melting point, an alloy (51% indium, 32.5% bismuth and 16.5% Sn) with low melting point, an alloy (63% Pb and 37% Sn) with low melting point and an alloy (50% Pb and 50% indium) with low melting point. During solder bump manufacture, a chip is coated with a passivation layer for sealing and keeps the solder dry. After a hole is formed and disposed above a metal pad, a multi-layer metal thin film (general called as under bump metallurgy) with Cr, Cu and Au is sputtered for providing adhesion and diffusive obstruction, increasing the wetness of solder and avoiding oxidation. Then, an alloy (Pb and Sn) with 100˜125 μm is formed by means of technology of evaporation, dipping or ultrasonic soldering. During subsequent processes of heat treatment of connection, the solder layer will form a ball-shaped solder bump by means of surface tension after the solder melts. Conversely, a pad of a substrate must also be plated with a multi-layers metal thin layer (called as top surface metallurgy, TSM) for providing the wetting of connection of the solder bump.
The reliability of soldering a connection between different materials is an important consideration of the reliability of an electronic product. Among solder material, upper and lower main material to be soldered, atoms is moved to induce the reaction between interfaces and further an intermetallic compound (IMC) is formed because of different chemical formulas. The intermetallic compound which is generated is the main factor of crack and damage the soldering connection. All the thickness, kind, shape and composition of the intermetallic compound are formed by using the heat treatment greatly affect the electrical performance and reliability of the flip chip. Thus, it is very important for analysis work to make a clear photo using scanning electron microscopy (SEM) for understanding the reaction between interfaces of the intermetallic compound.
In addition, the stress which is generated by the difference between the coefficient of thermal expansion of the chip and the substrate, and the fatigue which is generated by the repeated operating temperature are also the main factors of damage of the soldering connection of the solder bump of the flip chip. The fatigue damage of the soldering connection includes a mechanical fatigue and a thermal fatigue, and the latter is a major factor.
The chemical composition, mechanical property, height, shape and geometric arrangement of the solder are also important factors of soldered connection lifetimes except the difference between the coefficient of thermal expansion and repeating operating temperature. Thus, resisting the fatigue of the soldering connection has been an important research subject for improving the reliability of the connection of the flip chip.
In a conventional material analysis technology, a scanning electron microscopy should be the most used. The scanning electron microscopy includes an electron gun that emits an electron beam downwards. The electron beam is focused through a set of condenser lens, passes through a set of scanning coil of controlling electron beam by using a condenser aperture to select the beam size, and then is focused on a sample through an objective lens. A signal receiver device is disposed above the sample for selecting secondary electrons or backscattered electrons to form an image.
According to the sample which is used in the scanning electron microscopy, conventional processing method removes a deforming layer of the sample by utilizing a chemical etching method. The chemical etching is a selective etching method, and therefore different chemical solutions which are used to etch the deforming layer depend on different kinds of materials and the composition to be researched. In other words, a specific chemical solution only etches a specific material or composition. Thus, the sample includes various elements or phases that can have a problem of over-etching of some element or phase by utilizing the chemical etching. Careful consideration is required to the dangers of making the chemical solution and the effects of polluting the environment.
Taiwan Patent No. 329,020 entitled “Making Technology Of Sample of An Electron Microscopy Of A Thin Film Transistor”, discloses that a sample of an electron microscope is made by utilizing grinding and polishing technology. However, after cutting, grinding and polishing, a deforming layer can be formed on a typical sample that affects the inspection of the SEM photo.
Accordingly, there exists a need for a method of inspecting a connecting surface of a flip chip to solve the above-mentioned problems and disadvantages.